1. Field of the Invention
The present invention relates to convergence system of a projection TV, and more particularly, to vertical/horizontal interpolation device and method for each mode in a convergence system.
2. Background of the Related Art
As shown in FIG. 1, different from a direct view TV, a first related art backward projection TV is provided with three CRTs 1 for respectively projecting beams of R, G and B and three projection lenses 2 for respectively enlarging the beams from the CRTs 1. A mirror 3 reflects the R, G and B beams enlarged from the projection lenses 2 in a direction and a screen forms an image of the R, G and B beams reflected by the mirror 3. A circuit (not shown) controls operation of the aforementioned parts.
In the first related art projection TV, electron beams of R, G and B are projected from the respective R, G and B CRTs 1 by the circuit (not shown) and respectively enlarged by the projection lens 2. The enlarged R, G, B electron beams are reflected by the mirror 3 and enlarged to project onto the screen 4. In this instance, mis-convergences occur as shown in FIG. 2 because of differences of the R, G and B beams in their incident angles to the screen 4. In convergence correcting circuits employed for correcting the mis-convergences, there are at large analog convergence correcting circuits and digital convergence correcting circuits. The digital convergence correcting circuit stores data between each of adjustment points on the screen 4 in a memory (not shown) for adjusting a convergence at each of the adjustment points on the screen 4. And, depending on the means of obtaining a correcting data required for a convergence from the adjustment point data, there are software based interpolations and hardware based interpolations. In the hardware based interpolations, the mis-convergences are corrected by applying appropriate vertical/horizontal correcting currents to each of the convergence yokes in the respective CRTs to adjust paths of electron beams.
FIG. 3 is a block diagram showing a second background art convergence system in a projection TV. The second background art convergence system includes a key part 10, a controlling part 20, an EEPROM 30, ASIC 40, PLL 50, D/A converting part 60, a sample and hold and LPF 70 and amplifying part 80. As shown in FIG. 4, the ASIC 40 is provided with a test pattern generating part 45 for generating test patterns in response to horizontal/vertical blanking signals H.sub.-- BLK and V-BLK and a horizontal/vertical interpolating part 46 for making horizontal/vertical interpolation of horizontal/vertical adjustment points in the test patterns generated in the test pattern generating part 45. The horizontal/vertical interpolating 46 is provided with an HRAM (horizontal RAM) 41 for storing a horizontal adjustment point data in response to a control signal from the controlling part 20 and a horizontal interpolating part 42 for making a horizontal interpolation of the stored horizontal adjustment point data. A VRAM (vertical RAM) 43 stores a vertical adjustment point data of the horizontally interpolated horizontal/vertical adjustment point data, and a vertical interpolating part 44 makes a vertical interpolation of the stored vertical adjustment point data. The horizontal/vertical interpolating part 46 provides the horizontally and vertically interpolated horizontal/vertical adjustment point data to the D/A converting part 60. The amplifying part 80 is connected to CRTs 90, a mirror 100, and a screen 110, which are identical to the ones shown in FIG. 1.
The convergence adjustment operation of the second related art convergence system in a projection TV will now be described. Watching a displayed adjustment test pattern, a user or an adjuster, determines mis-convergences between R, G and B patterns of a spot or location, determines a direction of adjustment, and provides the direction to the controlling part 20 using the key part 10, i.e., a remote controller. The controlling part 20 stores the adjustment point data of the spot in a RAM (not shown) in the ASIC 40. The PLL part 50 receives the horizontal/vertical blanking signal H.sub.-- BLK and V.sub.-- BLK, generates a synchronous clock, provides the synchronous clock to the test pattern generating part 45 in the ASIC 40, and provides the vertical blanking signal H.sub.-- BLK and V.sub.-- BLK to the controlling part 20. The horizontal/vertical interpolating part 46 in the ASIC 40 uses the adjustment point data stored in the RAM for calculating horizontal/vertical correcting data. The horizontal/vertical correcting data are calculated by preset horizontal/vertical interpolating equations. Once calculated, the correcting data is provided to R, G and B, which are respectively three channels in the D/A converting part 60, in synchronization to the clock signal from the PLL 50.
The D/A converting part 60 then converts the received convergence correcting data into analog data and provides to the analog data to the sample and hold and LPF 70. The sample and hold and LPF 70 includes first and second sample and hold and LPF 71 and 72 for separately processing the horizontal/vertical correcting data. That is, the horizontal/vertical correcting data from the D/A converting part 60 are respectively separated for horizontal and vertical correcting data and low pass filtering in the first and second sample and hold and LPF 71 and 72, and then provided to the amplifying part 80. The amplifying part 80 uses the first and second amplifying parts 81 and 82 to respectively amplify the separated and low pass filtered horizontal and vertical correcting data in terms of current for driving the convergence yokes CY in the CRTs 90. The amplified horizontal and vertical correcting data are applied to horizontal/vertical convergence yokes in respective CRTs 90 separated by colors for adjusting paths of the electron beams. When the adjusted electron beams are reflected by the mirror 100 and enlarged/projected onto the screen 110, the convergence adjustment is complete. Once the convergence adjustment is completed to remove mis-convergences in the adjustment test pattern as described above, the controlling part 20 reads the final adjustment point data having been adjusted for convergence from the RAMs in the ASIC 40 and stores it in the EEPROM (Electrically Erasable Read Only Memory) 30, which is a non-volatile memory. A convergence adjustment for one mode is thus completed. All the images subsequently received are convergence adjusted according to the adjustment point data stored in the EEPROM 30.
In the meantime, a test pattern displayed on the screen 110 differs in the convergence adjustments depending on modes as shown in FIGS. 5a.about.5c. The modes include overscan mode, underscan mode and 4:3 mode. A number of the convergence adjustment points and corresponding positions differ depending on the three modes. As shown in FIGS. 5a.about.5c, "x" marks represent the convergence adjustment points. In the case of the overscan mode, the number of convergence adjustment points is 35 as shown in FIG. 5a. In the case of the 4:3 mode, the number of convergence adjustment points is 45 as shown in FIG. 5b. In the case of the underscan mode, the number of convergence adjustment points is 45 as shown in FIG. 5c, From these adjustment points, convergence horizontal interpolation data for 80 points as shown in FIG. 5d are calculated using horizontal interpolation equations (i.e., equations 1.about.12) described below. From the convergence horizontal interpolation data for the 80 points, final convergence data to be presented for all fields can be obtained by using vertical interpolation equations (i.e, equations 13.about.19) described below. In screens, which are represented in FIGS. 5a, 5b and 5c with a thick solid line, points within the screens at which precise horizontal/vertical interpolations are desirable are high order interpolated, while points outside of the screens at which precise horizontal/vertical interpolations are required are first order interpolated. Differences according to the modes will now be described.
In the case of the overscan mode, an image is projected a little larger than actual screen as in a general TV signal. In overscan, positions 2, 4, 6, 8, 10, 12 and 14 are the adjustment points, positions within the screen 3, 5, 7, 9, 11 and 13 are high order interpolated and positions 0, 1 and 15 outside of the screen are first order interpolated to obtain 80 horizontal interpolation data as shown in FIG. 5d. The overscan mode is shown in FIG. 5a.
In the case of the underscan mode, an image is projected a little smaller than actual screen as in a PC signal. In underscan mode, positions 1, 2, 4, 6, 8, 10, 12, 14 and 15 are the adjustment points, positions 3, 5, 7, 9, 11 and 13 within the screen are high order interpolated and a position 0 outside of the screen is first order interpolated to obtain 80 horizontal interpolated data as shown in FIG. 5d. The underscan mode is shown in FIG. 5c.
In the case of the overscan mode, positions 3 and 13 on opposite sides of the screen may be difficult to adjust because of deflection of the electron beams. The 4:3 mode adds adjustment points around these locations. The 4:3 mode is shown in FIG. 5b. In the case of 4:3 mode, positions 2, 3, 4, 6, 8, 10, 12, 13 and 14 are the adjustment points, positions 5, 7, 9 and 11 within the screen are high order interpolated and positions 0, 1 and 15 outside of the screen are first order interpolated to obtain 80 horizontal interpolation data as shown in FIG. 5d.
This can be summarized as follows:
______________________________________ (1) Overscan Mode, positions 3, 5, 7, 9, 11 and 13 (high order interpolation), positions 0, 1 and 15 (first order interpolation), positions 2, 4, 6, 8, 10, 12 and 14 (adjustment points); (2) Underscan Mode, positions 3, 5, 7, 9, 11 and 13 (high order interpolation), position 0 (first order interpolation), positions 1, 2, 4, 6, 8, 10, 12, 14 and 15 (adjustment points); and (3) 4:3 Mode, positions 5, 7, 9 and 11 (high order interpolation), positions 0, 1 and 15 (first order interpolation), positions 2, 3, 4, 6, 8, 10, 12, 13 and 14 (adjustment points). In the horizontal interpolation equations: ##STR1## 1 (1) 2 #STR2## (2) 3 #STR3## (3) 4 #STR4## (4) 5 #STR5## (5) 6 #STR6## (6) 7 #STR7## (7) 8 #STR8## (8) y.sub.15 = y.sub.12 + 3/2 .times. (y.sub.14 - y.sub.12) (9) y.sub.0 = y.sub.15 + 1/3 .times. (y.sub.2 - y.sub.15) (10) y.sub.1 = y.sub.15 + 2/3 .times. (y.sub.2 - y.sub.15) (11) y.sub.0 = 1/2 .times. (y.sub.0 + y.sub.15) (12) ______________________________________
In the equations (1).about.(7), y.sub.0 .about.y.sub.7 are the seven data in a horizontal line in convergence data provided to the EEPROM 30. Equation (8) is a horizontal 6th order interpolation equation for a high order interpolation. Equations (9).about.(11) are horizontal first order interpolation equations for overscan and 4:3 modes and equation (12) is a horizontal first order interpolation equation for an underscan mode. The y.sub.0, y.sub.1, y.sub.12, y.sub.14 and y.sub.15 in equations (9).about.(12) represent positions 0, 1, 12, 14 and 15 on the screen, respectively.
In the vertical interpolation equations, ##EQU1##
In the equations (13).about.(19), y.sub.0 .about.y.sub.4 are five data in a vertical line in the convergence data in which horizontal interpolation has been completed. Equation (8) is a vertical fourth order interpolation equation for high order interpolation. In the equations (18) and (19), which are for making vertical first order interpolation for the first order interpolation regions, VA represents a scanning line, "m" represents a number of scanning lines in a high order interpolation, "z" represents a number of scanning lines in a first interpolation, and "h" represents a distance between adjacent adjustment points.
A third related art system for performing the horizontal/vertical interpolations according to the modes is illustrated in FIG. 6. Referring to FIG. 6, a third related art hardware system is provided with an HRAM 41, a first horizontal interpolating part 42-1, a second interpolation part 42-2, a third interpolating part 42-3, a multiplexer 42-4, a VRAM 43 and a vertical interpolating part 44. The first horizontal interpolating part 42-1 is provided with a first horizontal first order interpolating part 42a for conducting a horizontal first order interpolation and a first horizontal high order interpolating part 42b for conducting a horizontal high order interpolation in an overscan mode. The second horizontal interpolating part 42-2 is provided with a second horizontal first order interpolating part 42c for conducting a horizontal first order interpolation and a second horizontal high order interpolating part 42d for conducting a horizontal high order interpolation in an underscan mode. The third horizontal interpolating part 42-3 is provided with a third horizontal first order interpolating part 42e for conducting a horizontal first order interpolation and a third horizontal high order interpolating part 42f for conducting a horizontal high order interpolation.
The operation of the third related art system for adjusting a convergence will now be described. Horizontal/vertical convergence adjustment point data in one of the overscan mode, the underscan mode and the 4:3 mode is stored in the HRAM 41 through the test pattern generating part 45. If the third related art convergence adjusting device is in an overscan mode, vertical/horizontal adjustment point data in the overscan mode is provided to the first horizontal interpolating part 42-1 through the HRAM 41. Then, the first horizontal first/high order interpolating parts 42a and 42b in the first horizontal interpolating part 42-1 conduct horizontal first/high order interpolations according to the horizontal interpolating equations (equations 1 to 12) and provide results to the multiplexer 42-4. The multiplexer 42-4 selects the horizontally interpolated horizontal/vertical convergence data in the overscan mode in response to a mode selecting signal (i.e., an overscan mode selecting signal) and provides them to the vertical interpolating part 44 through the VRAM 43. The vertical interpolating part 44 conducts vertical first/high order interpolations for the vertical convergence data of the horizontally interpolated horizontal/vertical convergence data using the vertical first order interpolating part 44a and the vertical high order interpolating part 44b according to the vertical interpolating equations(equations 13.about.19) and provides results to the D/A converting part 60 shown in FIG. 4.
When vertical/horizontal convergence adjustment point data in the underscan mode is provided to the second horizontal interpolating part 42-2 through the HRAM 41, the second horizontal first/high order interpolating parts 42c and 42d respectively conducts horizontal first/high order interpolations according to the horizontal interpolating equations (equations 1.about.12) and provides results to the multiplexer 42-4. The multiplexer 42-4 selects interpolated horizontal/vertical convergence data in the underscan mode in response to a mode selecting signal (i.e., an underscan mode selecting signal) and provides them to the vertical interpolating part 44 through the VRAM 43. The vertical first order interpolating part 44a and the vertical high order interpolating part 44b in the vertical interpolating part 44 respectively conduct vertical first order and vertical high order interpolations for the vertical convergence data of the horizontally interpolated horizontal/vertical convergence data in the underscan mode according to the vertical interpolating equations (equations 13.about.19) and provides results to the D/A converting part 60.
When vertical/horizontal convergence adjustment point data in the 4:3 mode are provided to the third horizontal interpolating part 42-3 through the HRAM 41, the first horizontal first/high order interpolating parts 42e and 42f in the third horizontal interpolating part 42-3 respectively conduct horizontal first/high order interpolations according to the horizontal interpolating equations (equations 1.about.12) and provides results to the multiplexer 42-4. The multiplexer 42-4 selects the interpolated horizontal/vertical convergence data in the 4:3 mode in response to a mode selecting signal (i.e., a 4:3 mode selecting signal) and provides them to the vertical interpolating part 44 through the VRAM 43. For the horizontally interpolated horizontal/vertical convergence data in the 4:3 mode provided to the vertical first order interpolating part 44a and the vertical high order interpolating part 44b in the vertical interpolating part 44, vertical first/high order interpolations for the vertical convergence data are conducted according to the vertical interpolating equations (equations 13.about.19) and results provided to the D/A converting part 60. As operation hereafter are identical to the second related art device as shown in FIG. 4, further descriptions are omitted.
As described above, the related art horizontal/vertical interpolating device in the related art convergence systems has various problems. Since horizontal first order and high order interpolations are separately performed according to each of the three modes, a low processing efficiency problem results. Further, the horizontal/vertical interpolating device in the related art convergence system has a problem of having a complicated hardware system because a horizontal interpolation process for each mode is conducted by separate hardware systems.